Bipolar TransistorsActive

2N2222A

Manufacturer: Central Semiconductor

Figures from the datasheet: Central Semiconductor, rev. R5, December 5, 2013

Central Semiconductor 2N2222A NPN switching transistor in TO-18; absolute VCEO limit 40 V and continuous IC limit 800 mA at TA = 25°C.

PackagesTO-18
Official Datasheet (PDF)

Technical Overview

01

Technical Overview

This page covers only Central Semiconductor 2N2222A in TO-18, using datasheet 2N2221A.PDF, R5 (5-December 2013). Electrical characteristics apply at TA = 25°C unless stated otherwise, and only under the complete listed test conditions. Absolute maximum ratings are stress limits, not recommended operating conditions. In the manufacturer drawing E1 is left, B2 above center and C3 right, with the tab lower left; this identifies source-relative orientation without asserting an independently confirmed top or bottom view. The exact product-directory row is Active; appended PDN01195 concerns other listed types. Do not transfer these specifications to other manufacturers or plastic variants.

Package Pinout & Alternate Functions

Interactive package pinout and pin mapping for TO-18-3.

Interactive pinout diagramManufacturer lead diagram

2N2222A: TO-18 package illustrationManufacturer lead diagram1: E2: B3: C

Package illustration, not a dimensioned mechanical drawing.

3 / 3 pins
#Pin nameType5V TolerantAlternate functions / details
Epassive—
Emitter, lead 1: left in the manufacturer drawing, nearest the lower-left tab. Preserve the source drawing orientation.
Bpassive—
Base, lead 2: above center in the manufacturer drawing, at 90° to each of leads 1 and 3.
Cpassive—
Collector, lead 3: right in the manufacturer drawing. No internal electrical connection to the metal case is confirmed by the cited drawing.

Key Specifications

Parametric attributes

ParameterMinTypicalMaxUnitTest condition
Collector-Base Breakdown Voltage(BVCBO)75——VIC = 10 µA, TA = 25°C
Collector-Emitter Breakdown Voltage(BVCEO)40——VIC = 10 mA, TA = 25°C
Emitter-Base Breakdown Voltage(BVEBO)6——VIE = 10 µA, TA = 25°C
Collector Cutoff Current(ICBO)——10nAVCB = 60 V, TA = 25°C
Emitter Cutoff Current(IEBO)——10nAVEB = 3.0 V, TA = 25°C
Collector-Emitter Saturation Voltage at 150mA(VCE_sat_150)——0.3VIC = 150 mA, IB = 15 mA, TA = 25°C
Collector-Emitter Saturation Voltage at 500mA(VCE_sat_500)——1VIC = 500 mA, IB = 50 mA, TA = 25°C
Base-Emitter Saturation Voltage at 150mA(VBE_sat_150)0.6—1.2VIC = 150 mA, IB = 15 mA, TA = 25°C
Base-Emitter Saturation Voltage at 500mA(VBE_sat_500)——2VIC = 500 mA, IB = 50 mA, TA = 25°C
DC Current Gain at 150mA(hFE_150)100—300ratioVCE = 10 V, IC = 150 mA, TA = 25°C
DC Current Gain at 500mA(hFE_500)40——ratioVCE = 10 V, IC = 500 mA, TA = 25°C
Current-Gain Bandwidth Product(fT)300——MHzVCE = 20 V, IC = 20 mA, f = 100 MHz, TA = 25°C
Output Capacitance(Cob)——8pFVCB = 10 V, IE = 0 A, f = 100 kHz, TA = 25°C
Input Capacitance(Cib)——25pFVEB = 0.5 V, IC = 0 A, f = 100 kHz, TA = 25°C
Delay Time(td)——10nsVCC = 30 V, VBE = 0.5 V, IC = 150 mA, IB1 = 15 mA, TA = 25°C
Rise Time(tr)——25nsVCC = 30 V, VBE = 0.5 V, IC = 150 mA, IB1 = 15 mA, TA = 25°C
Storage Time(ts)——225nsVCC = 30 V, IC = 150 mA, IB1 = IB2 = 15 mA, TA = 25°C
Fall Time(tf)——60nsVCC = 30 V, IC = 150 mA, IB1 = IB2 = 15 mA, TA = 25°C
Collector-base voltage absolute limit(VCBO_abs)——75VTA = 25°C
Collector-emitter voltage absolute limit(VCEO_abs)——40VTA = 25°C
Emitter-base reverse-voltage absolute limit(VEBO_abs)——6VTA = 25°C
Continuous collector current absolute limit(IC_abs)——800mATA = 25°C
Device dissipation absolute limit at ambient temperature(PD_TA_abs)——500mWTA = 25°C
Device dissipation absolute limit at case temperature(PD_TC_abs)——1.8WTC = 25°C
Operating junction-temperature absolute limits(TJ_abs)-65—200°CJunction-temperature stress limits, not an ambient operating range

Absolute Maximum Ratings

Storage temperature-65 – 200 °C
Thermal resistance θJA (TO-18)350 °C/W
Thermal resistance θJC (TO-18)97 °C/W

Hardware Engineering Gotchas

Real-world hardware caveats, PCB layout constraints and silicon errata to know before manufacturing.

Critical

Absolute Maximum Collector Current (800mA) Versus Free-Air Thermal Dissipation in TO-18

IC = 800 mA is an absolute limit, not a thermally safe operating current. At IC = 500 mA and IB = 50 mA, using both voltage maxima yields a conservative conduction-loss bound P = IC·VCE + IB·VBE = 0.5 A·1.0 V + 0.05 A·2.0 V = 0.6 W, above 500 mW at TA = 25°C before switching losses. This is not measured dissipation or a claim that both maxima occur simultaneously.

Mitigation

Estimate average dissipation and check the real thermal path with margin: TJ ≈ TA + Pavg·ThetaJA in free air, or TJ ≈ TC + Pavg·ThetaJC with controlled case temperature and the external thermal path accounted for. The 1.8 W rating requires TC = 25°C, not simply an attached heatsink. There is no universal current threshold for heatsinking.

Critical

Emitter-Base Reverse Breakdown Voltage (6.0V) in Astable and Inductive Circuits

Absolute VEBO = 6.0 V and the separate minimum breakdown characteristic BVEBO ≥ 6.0 V at IE = 10 µA are different specifications. A breakdown test does not authorize repetitive avalanche; the datasheet provides no such allowance. Capacitive base transients must remain within the reverse-voltage limit.

Mitigation

Check the actual emitter-base waveform including startup and switching. An NPN reverse-voltage clamp diode has its anode at E and cathode at B; check pulse current, forward drop, tolerances and changed timing. A supply label alone does not prove protection; a series base diode is not an equivalent clamp.

Warning

Base Drive Requirements for Deep Saturation and Storage Time Delays

VCE(SAT) is characterized at IC = 150 mA, IB = 15 mA and at IC = 500 mA, IB = 50 mA. These IC/IB = 10 points are not a universal drive recipe. Insufficient drive can increase VCE and losses depending on load. The ts ≤ 225 ns limit applies only at VCC = 30 V, IC = 150 mA, IB1 = IB2 = 15 mA and TA = 25°C, not arbitrary PWM conditions.

Mitigation

Select base drive for the intended current, voltage and temperature using applicable characterized conditions. Check driver source/sink capability and guaranteed output voltages; the 50 mA base-current test point can exceed a GPIO rating. Turn-off and any charge-control circuit need their own circuit-level verification.

Reference Circuits

2N2222 / 2N2222A NPN BJT Relay Driver with 1N4007 Flyback Clamping Diode

Topology: Common-emitter low-side NPN saturated relay driver switch with base limiting resistor, 10 kΩ pull-down bleeder, antiparallel 1N4007 flyback clamp diode, and DC bus decoupling.

Inspect schematicOpen in Web CAD Editor

Official Documentation & Cited Datasheets

Primary semiconductor vendor datasheets, errata, and application notes.

DATASHEETCentral Semiconductor

2N2221A, 2N2222A Silicon NPN Transistors

DATASHEETCentral Semiconductor

Package Details - TO-18 Mechanical Drawing and Material Specification

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