Op-Amps & ComparatorsActive

LM393P

Manufacturer: Texas Instruments

Figures from the datasheet: Texas Instruments SLCS005, rev. Rev. AH, April 2025

Industry-standard dual differential comparator with open-collector outputs, single-supply (2V to 36V) or dual-supply (±1V to ±18V) operation, low power consumption, and true ground-level sensing.

PackagesPDIP-8, SOIC-8
Supply voltage2 – 36 V
Temperature range0 – 70 °C

Technical Overview

01

Technical Overview

The LM393 is an industry-standard dual differential comparator manufactured by Texas Instruments (Document SLCS005, revised April 2025). Housed in an 8-pin through-hole PDIP package (P designation) and surface-mount SOIC-8 (D designation), it integrates two independent precision voltage comparators designed to operate from a single power supply over a wide voltage span from 2V to 36V (or ±1V to ±18V split supplies). The LM393 features an open-collector NPN output architecture capable of driving loads up to 36V independently of the VCC supply rail, facilitating seamless level-shifting and direct interfacing with TTL, DTL, ECL, MOS, and CMOS logic circuits. Its PNP differential input pair provides true ground sensing with an input common-mode range that extends down to 0V (the negative supply rail), enabling direct detection of ground-referenced signals without negative bias rails. With a typical quiescent supply current of only 0.8mA for both comparators combined, an open-loop voltage gain of 200 V/mV (106 dB), typical response time of 1.3µs, and low input offset voltage (2mV typ, 5mV max), the LM393 is universally utilized in zero-crossing detectors, window comparators, threshold switches, Schmitt triggers, oscillator circuits, and mixed-voltage level translation interfaces.

Package Pinout & Alternate Functions

Interactive package pinout and pin mapping for PDIP-8.

Interactive pinout diagramTop

LM393P: PDIP-8 package illustrationInteractive package pinout and pin mapping for PDIP-8.1: 1OUT2: 1IN-3: 1IN+4: GND8: VCC7: 2OUT6: 2IN-5: 2IN+

Package illustration, not a dimensioned mechanical drawing.

8 / 8 pins
#Pin nameType5V TolerantAlternate functions / details
1OUTopen drainYes
Channel 1 open-collector output terminal (requires external pull-up resistor to logic supply rail)
1IN-analog inYes
Channel 1 inverting input terminal (-)
1IN+analog inYes
Channel 1 non-inverting input terminal (+)
GNDground—
Ground / negative supply terminal (connects to 0V ground in single-supply or negative rail V- in split-supply operation)
2IN+analog inYes
Channel 2 non-inverting input terminal (+)
2IN-analog inYes
Channel 2 inverting input terminal (-)
2OUTopen drainYes
Channel 2 open-collector output terminal (requires external pull-up resistor to logic supply rail)
VCCpower in—
Positive power supply terminal (single supply 2V to 36V, or positive rail up to +18V in split-supply operation)

Key Specifications

Parametric attributes

ParameterMinTypicalMaxUnitTest condition
Input Offset Voltage(VIO)—25mVVCC = 5 V to 30 V, VICR = 0 V, VO = 1.4 V, TA = 25°C
Input Bias Current(IIB)—-25-250nAVO = 1.4 V, TA = 25°C (current flows out of input pins)
Input Offset Current(IIO)—550nAVO = 1.4 V, TA = 25°C
Common-Mode Input Voltage Range(VICR)00 to (VCC) - 1.5—VVCC = 5 V to 30 V, TA = 25°C; linear operation extends to ground (0 V)
Large-Signal Differential Voltage Amplification(AVD)50200—V/mVVCC = 15 V, VO = 1.4 V to 11.4 V, RL >= 15 kΩ connected to VCC, TA = 25°C
Large-Signal Response Time(tRESP)—1.3—µs100 mV input step with 5 mV overdrive, RL = 5.1 kΩ connected to 5 V, CL = 15 pF, TA = 25°C
Total Quiescent Supply Current(ICC)—0.81mAVCC = 5 V, RL = ∞ (both comparators), TA = 25°C
Low-Level Output Saturation Voltage(VOL)—150400mVISINK <= 4 mA, VID = -1 V, TA = 25°C
Output Sink Current Capability(ISINK)616—mAVID = -1 V, VO = 1.5 V, TA = 25°C
High-Level Output Leakage Current(IOH)—0.11000nAVID = 1 V, VO = 30 V, TA = 25°C
Differential Input Voltage Rating(VID_max)—±3636VMaximum differential voltage between IN+ and IN- without latch-up or damage

Absolute Maximum Ratings

Max supply voltage (VDD/VCC)36 V
Max input voltage36 V
Max output / pin current20 mA
Junction temperature0 – 70 °C
Storage temperature-65 – 150 °C
ESD rating (HBM)1000 V
Thermal resistance θJA (PDIP-8)85 °C/W
Thermal resistance θJC (PDIP-8)66.8 °C/W
Thermal resistance θJA (SOIC-8)125 °C/W
Thermal resistance θJC (SOIC-8)80 °C/W

Hardware Engineering Gotchas

Real-world hardware caveats, PCB layout constraints and silicon errata to know before manufacturing.

Critical

Mandatory External Pull-Up Resistor (Open-Collector Output)

The LM393 output stage consists solely of an uncommitted NPN bipolar transistor with an open collector connected to the output pin and emitter tied to GND. Unlike operational amplifiers with push-pull Class-AB output stages, the LM393 cannot actively source current or pull the output pin high on its own. Leaving the output unconnected or without an external pull-up resistor leaves the output pin floating in a high-impedance state when the output transistor turns off, producing no defined high logic level.

Mitigation

Always connect an external pull-up resistor between each output pin (1OUT, 2OUT) and a positive power rail. The pull-up voltage is independent of VCC and may connect to 3.3V, 5V, 12V, or up to 36V to interface with different logic families. Choose a pull-up resistance typically between 1 kΩ and 10 kΩ: lower resistance accelerates low-to-high transition speed across parasitic load capacitance, while higher resistance reduces static power dissipation when sinking current (ISINK <= 4 mA).

Critical

Input Common-Mode Ceiling Limitation (VCC - 1.5 V)

The PNP differential input pair requires at least 1.5 V headroom below the positive supply rail VCC at 25°C (2.0 V over full operating temperature) to keep the internal constant-current source out of saturation. Exceeding (VCC - 1.5 V) on either input while the other remains within range forces the input stage into saturation. If an input voltage exceeds VCC by more than 0.3 V, forward-biasing the internal substrate PN junction can cause false output phase inversion or parasitic SCR latch-up.

Mitigation

Ensure both input voltages remain strictly between GND (0 V) and (VCC - 1.5 V). In a 5 V single-supply configuration, ensure input signals do not exceed 3.5 V. When monitoring signals near or above VCC, implement a resistive voltage divider to scale the signal down into the valid common-mode window, or power the comparator from a higher supply rail.

Warning

Parasitic Output Oscillation Without Hysteresis

Because the LM393 has an open-loop gain exceeding 100 dB (200,000 V/V) and fast sub-microsecond response time, input noise in the microvolt to millivolt range causes violent rapid switching (chatter or bursts of high-frequency oscillation) whenever an analog input signal transitions slowly through the comparison threshold. Fast output edges can also capacitively couple back into high-impedance input traces, generating parasitic regenerative oscillation.

Mitigation

Always incorporate positive feedback (Schmitt trigger hysteresis) when processing slowly changing analog inputs. Connect a high-value resistor (typically 100 kΩ to 1 MΩ) between the output pin and the non-inverting input (IN+). This creates a distinct upper and lower switching threshold (typically 10 mV to 50 mV hysteresis band) that cleanly suppresses threshold chatter and eliminates output oscillation.

Note

Termination of Unused Comparator Channels

The LM393 package houses two independent comparator channels. If one channel is left unused with its input terminals floating, atmospheric electromagnetic noise and internal parasitic capacitive coupling cause the unused comparator to switch randomly. This rapid toggling injects switching noise into the VCC supply rail and ground return, increasing power consumption and potentially disturbing the active comparator channel.

Mitigation

Properly terminate the unused channel by holding its output in a known, stable state. Connect the unused non-inverting input (IN+) directly to circuit ground (0 V), connect the inverting input (IN-) to a stable DC reference voltage within the common-mode input range (such as mid-supply or a divided rail, or through a resistor to VCC if within VICR), and leave the unused open-collector output pin floating (unconnected) so that zero current is wasted.

Cross-Reference & Equivalents

Part number (MPN)ManufacturerCompatibilityElectrical differences / BOM considerations
LM2903PTexas Instrumentspin to pin drop inAutomotive and extended industrial temperature range (-40°C to 125°C); maximum supply voltage rated to 26V (classic) or 36V (B-version); identical pinout and open-collector architecture.
LM393APTexas Instrumentspin to pin drop inPrecision variant featuring tighter input offset voltage (VIO <= 2 mV max vs 5 mV max) and lower input offset current (IIO <= 25 nA max).
LM293PTexas Instrumentspin to pin drop inIndustrial temperature range (-25°C to 85°C) with identical pinout and open-collector output characteristics.

Reference Circuits

LM393 Precision Voltage Comparator with Hysteresis

Topology: Non-inverting Schmitt trigger comparator with 48.5 mV hysteresis deadband, 2.50 V midpoint reference divider, and open-collector output.

Official Documentation & Cited Datasheets

Primary semiconductor vendor datasheets, errata, and application notes.

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