Interface & USB BridgesActive

CH340G

Manufacturer: WCH (Jiangsu Qinheng)

Figures from the datasheet: WCH (Jiangsu Qinheng) CH340DS1, rev. 3D

USB to UART serial bridge in SOP-16 with modem signals and an external 12 MHz crystal, common on low-cost Arduino-compatible and ESP8266 boards.

PackagesSOP-16
Supply voltage2.9 – 5.3 V

Technical Overview

The CH340G is a full-speed USB 2.0 to serial bridge from WCH. It provides TXD/RXD plus the modem signals RTS#, DTR#, CTS#, DSR#, RI# and DCD#, supports baud rates from 50 bps to 2 Mbps and runs from either 5 V or 3.3 V. Unlike the CH340C/N/K/E/X/B, it needs an external 12 MHz crystal. On a computer it uses WCH's CH341 VCP driver. Board makers usually drive an auto-reset circuit from DTR# and RTS#. The figures on this page come from the WCH CH340 datasheet, version 3D.

Package Pinout & Alternate Functions

Interactive package pinout and pin mapping for SOP-16.

Interactive pinout diagramTop

CH340G: SOP-16 package illustrationInteractive package pinout and pin mapping for SOP-16.1: GND2: TXD3: RXD4: V35: UD+6: UD-7: XI8: XO16: VCC15: R23214: RTS#13: DTR#12: DCD#11: RI#10: DSR#9: CTS#

Package illustration, not a dimensioned mechanical drawing.

16 / 16 pins
#Pin nameType5V TolerantAlternate functions / details
GNDground—
Common ground, connected directly to the USB ground
TXDdigital ioNo
Serial data output (transmit); idle high
RXDdigital ioNo
Serial data input (receive) with built-in controllable pull-up and pull-down; idle high
V3power in—
Internal 3.3 V node: 0.1 µF to GND when VCC is 5 V; tie to VCC when VCC is 3.3 V
UD+digital ioNo
USB D+; connect directly to the USB bus without a series resistor (pull-up is internal)
UD-digital ioNo
USB D−; connect directly to the USB bus without a series resistor
XIanalog inNo
Crystal oscillator input: 12 MHz crystal with load capacitor to GND
XOanalog out—
Crystal oscillator output: 12 MHz crystal with load capacitor to GND
CTS#digital ioNo
Clear To Send modem input, active low (internal pull-up not stated in the datasheet)
DSR#digital ioNo
Data Set Ready modem input, active low (internal pull-up not stated in the datasheet)
RI#digital ioNo
Ring Indicator modem input, active low (internal pull-up not stated in the datasheet)
DCD#digital ioNo
Data Carrier Detect modem input, active low (internal pull-up not stated in the datasheet)
DTR#digital ioNo
Data Terminal Ready modem output, active low; often drives the MCU auto-reset. Before USB configuration it is read as an input (4.7 kΩ pull-down requests a larger supply current)
RTS#digital ioNo
Request To Send modem output, active low; often drives the boot/reset circuit
R232digital ioNo
Auxiliary RS232 enable, active high, built-in pull-down; leave unconnected for a TTL UART
VCCpower in—
Supply: 4.0–5.3 V (5 V mode) or 2.9–3.6 V with V3 tied to VCC; 0.1 µF decoupling capacitor

Key Specifications

Parametric attributes

ParameterMinTypicalMaxUnitTest condition
Supply Voltage, 5 V Mode(VCC_5V)455.3VV3 connected only to a 0.1 µF capacitor
Supply Voltage, 3.3 V Mode(VCC_3V3)2.93.33.6VV3 tied to VCC (CH340G)
Pin Voltage(VIO)-0.5—VCC + 0.5VAbsolute maximum; I/O is not 5 V tolerant at 3.3 V
Supply Current(ICC)—720mAVCC = 5 V, operating (4 / 12 mA at 3.3 V)
Suspend Current(ISLP)—0.090.2mAUSB suspended, VCC = 5 V
Baud Rate(Baud)—50 bps – 2 Mbps—bpsStandard rates up to 2 000 000
Transmit Baud Rate Error(BaudErr)—< 0.3—%CH340G with a 12 MHz crystal; receive tolerance about 2 %
USB Interface(USB)—2.0 Full-Speed—USB—
Crystal Frequency(f_osc)11.981212.02MHz33 pF load capacitors (47 pF for a ceramic resonator)
Power-On Reset Threshold(VR)2.42.62.8V—

Absolute Maximum Ratings

Max supply voltage (VDD/VCC)6 V
Operating junction temperature-40 – 85 °C
Storage temperature-55 – 125 °C

Hardware Engineering Gotchas

Real-world hardware caveats, PCB layout constraints and silicon errata to know before manufacturing.

CRITICAL

Wire V3 for Your Supply Voltage

Pin 4 (V3) is wired differently in the two supply modes. At 5 V, V3 gets only a 0.1 µF capacitor to GND and must not be connected to VCC. At 3.3 V, V3 is tied to VCC, and nothing connected to the chip may exceed 3.3 V.

Mitigation: 5 V: 0.1 µF from V3 to GND. 3.3 V: connect V3 to VCC and keep every connected signal at 3.3 V.
WARNING

No Series Resistors on D+ and D−

The USB transceiver and the D+ pull-up are internal. WCH recommends connecting UD+ and UD− straight to the USB lines without extra resistors.

Mitigation: Route UD+/UD− directly to the connector as a parallel pair with ground on both sides.
WARNING

Back-Powering Between Separately Powered Chips

If the CH340G runs from USB VBUS while the MCU has its own supply, current flows through TXD/RXD into whichever side is unpowered. The CH340G pins are not protected against this (unlike CH340K, CH340X and later CH340C/N lots).

Mitigation: Power both from the same supply, or add the diode and N-MOSFET isolation from section 7.7 of the datasheet.
INFO

Crystal Load Capacitors

The CH340G needs a 12 MHz quartz crystal between XI and XO with 33 pF capacitors to GND; a ceramic resonator usually needs about 47 pF. If the oscillator is hard to start, WCH suggests halving the XI capacitor.

Mitigation: Keep XI/XO traces short and the crystal close to the chip, surrounded by ground.

Cross-Reference & Equivalents

Part number (MPN)ManufacturerCompatibilityElectrical differences / BOM considerations
CH340CWCHpin to pin drop inBuilt-in clock: omit the crystal and its capacitors; pin 7 must be left unconnected and pin 8 becomes OUT#. Operating range −20…70 °C; transmit baud error below 1.8 %.
CP2102Silicon Labsfunctional requires bom changeDifferent package (QFN-28) and pinout, with its own driver; see the Silicon Labs datasheet.

Found on These Boards

This component is physically fitted to the following reference development boards in CircuitBase:

Official Documentation & Cited Datasheets

Primary semiconductor vendor datasheets, errata, and application notes.

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