Manufacturer: Texas Instruments, STMicroelectronics, onsemi, Diodes Incorporated
Industry-standard precision bipolar timer IC for astable multivibrators, monostable pulse generation, and PWM controllers.
The NE555 is a precision timing circuit capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the frequency and free-running duty cycle are controlled independently with two external resistors and a single external capacitor. The threshold and trigger levels normally are two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The figures on this page come from the Texas Instruments NE555 datasheet (SLFS022K); NE555 parts from other manufacturers are pin-compatible but their limits can differ slightly, so check the datasheet of the part you use.
Interactive package pinout and pin mapping for DIP-8.
Package illustration, not a dimensioned mechanical drawing.
| # | Pin name | Type | 5V Tolerant | Alternate functions / details |
|---|---|---|---|---|
| GND | ground | — | Ground reference (0V) | |
| TRIG | input only | Yes | Trigger input (active low, triggers output high when input drops below 1/3 VCC) | |
| OUT | power out | — | Output driver terminal (totem-pole stage sourcing or sinking up to 200mA) | |
| RESET | input only | Yes | Active-low reset: forces the output and discharge low. Guaranteed reset below 0.3 V and released above 1 V (0.7 V typical); tie to VCC if unused. | |
| CONT | analog in | Yes | Control voltage terminal (accesses internal 2/3 VCC divider; bypass with 10nF to ground) | |
| THRES | analog in | Yes | Threshold input (resets flip-flop and pulls output low when voltage exceeds 2/3 VCC) | |
| DISCH | open drain | Yes | Discharge open-collector NPN terminal (switches to GND in phase with output low to discharge timing cap) | |
| VCC | power in | — | Positive power supply terminal (+4.5V to +16V recommended, 18V absolute max) |
| Parameter | Typical | Unit | Test condition |
|---|---|---|---|
| Supply Voltage Range(VCC) | 5 | V | — |
| Supply Current (Low Output)(ICC) | 3 | mA | VCC = 5V, RL = infinity |
| Output Current Drive Capability(IOUT) | 200 | mA | — |
| Recommended Maximum Frequency(fMAX) | 100 | kHz | TI: use at 100 kHz or below to reduce distortion |
| Threshold Voltage Ratio(VTH) | 2/3 VCC | ratio | — |
| Trigger Voltage Ratio(VTR) | 1/3 VCC | ratio | — |
| Max supply voltage (VDD/VCC) | 18 V |
| Max output / pin current | 225 mA |
| Operating junction temperature | 0 – 70 °C |
Real-world hardware caveats, PCB layout constraints and silicon errata to know before manufacturing.
The bipolar output stage draws short current spikes from VCC every time the output switches. Without local decoupling these spikes disturb the supply rail, which can reset nearby microcontrollers or add jitter to the timing.
Pin 4 (RESET) resets the timer below 0.3 V (guaranteed) and releases above 1 V (0.7 V typical). Left floating, it can pick up noise and halt the oscillator intermittently.
Pin 5 connects directly to the internal 2/3 VCC divider network. High-frequency noise on VCC coupled into Pin 5 modulates the comparator trip thresholds, causing pulse-width jitter.
| Part number (MPN) | Manufacturer | Compatibility | Electrical differences / BOM considerations |
|---|---|---|---|
| TLC555 | Texas Instruments | pin to pin drop in | CMOS version (per the TI TLC555 datasheet): 2 V minimum supply, much lower supply current, rail-to-rail output and operation up to 2.1 MHz; check output-current limits before swapping. |
| LM555 | Texas Instruments | pin to pin drop in | Pin-compatible bipolar 555 timer; check its own datasheet for exact limits. |
| NE556 | Various | functional requires bom change | Dual 555 timer in 14-pin DIP/SOIC package requiring different PCB footprint. |
Primary semiconductor vendor datasheets, errata, and application notes.
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